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74ACTQ533 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
74ACTQ533 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Truth Table
Inputs
LE
OE
Dn
X
H
X
H
L
L
H
L
H
L
L
X
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O0 = Previous O0 before HIGH-to-LOW transition of Latch Enable
Outputs
On
Z
H
L
O0
Functional Description
The ACTQ533 contains eight D-type latches with 3-STATE
standard outputs. When the Latch Enable (LE) input is
HIGH, data on the Dn inputs enters the latches. In this con-
dition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is
LOW, the latches store the information that was present on
the D inputs at setup time preceding the HIGH-to-LOW
transition of LE. The 3-STATE standard outputs are con-
trolled by the Output Enable (OE) input. When OE is LOW,
the standard outputs are in the 2-state mode. When OE is
HIGH, the standard outputs are in the high impedance
mode but this does not interfere with entering new data into
the latches.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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