74LV125N View Datasheet(PDF) - Philips Electronics
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74LV125N Datasheet PDF : 12 Pages
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Philips Semiconductors
Quad buffer/line driver (3-State)
Product specification
74LV125
AC WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V and ≤ 3.6 V;
VM = 0.5 × VCC at VCC < 2.7 V and ≥ 4.5 V.
VOL and VOH are the typical output voltage drop that occur with the
output load.
VX = VOL + 0.3 V at VCC ≥ 2.7 V and ≤ 3.6 V;
VX = VOL + 0.1 × VCC at VCC < 2.7 V and ≥ 4.5 V.
VY = VOH – 0.3 V at VCC ≥ 2.7 V and ≤ 3.6 V;
VY = VOH – 0.1 ⋅ VCC at VCC < 2.7 V and ≥ 4.5 V.
Vl
nA INPUT
GND
V OH
nY OUTPUT
V OL
VM
t PHL
VM
t PLH
SV00459
Figure 1. Input (nA) to output (nY) propagation delays
and output transition times.
VI
nOE Input
GND
VCC
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
VM
tPLZ
tPZL
VX
tPHZ
VY
VM
tPZH
VM
outputs
enabled
outputs
disabled
outputs
enabled
SV00458
Figure 2. 3-state enable and disable times.
TEST CIRCUIT
PULSE
GENERATOR
VI
RT
VCC
D.U.T.
VO
CL 50 pF
2 * VCC
Open
GND
RL = 1k
RL = 1k
Test Circuit for Outputs
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitiance.
RT = Termination resistance should be equal to ZOUT of pulse generators.
SWITCH POSITION
TEST
S1
VCC
VI
tPLH/tPHL
Open
< 2.7V
VCC
tPLZ/tPZL
tPHZ/tPZH
2 * VCC
GND
2.7–3.6V
w 4.5V
2.7V
VCC
SV00896
Figure 3. Load circuitry for switching times.
1998 Apr 28
6
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