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MC14016BDR2 View Datasheet(PDF) - ON Semiconductor

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MC14016BDR2
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC14016BDR2 Datasheet PDF : 12 Pages
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MC14016B
Quad Analog Switch/
Quad Multiplexer
The MC14016B quad bilateral switch is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. Each MC14016B consists of four independent
switches capable of controlling either digital or analog signals. The
quad bilateral switch is used in signal gating, chopper, modulator,
demodulator and CMOS logic implementation.
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Linearized Transfer Characteristics
Low Noise — 12 nV/Cycle, f 1.0 kHz typical
Pin–for–Pin Replacements for CD4016B, CD4066B (Note improved
transfer characteristic design causes more parasitic coupling
capacitance than CD4016)
For Lower RON, Use The HC4016 High–Speed CMOS Device or
The MC14066B
This Device Has Inputs and Outputs Which Do Not Have ESD
Protection. Antistatic Precautions Must Be Taken.
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage Range
– 0.5 to +18.0
V
Vin, Vout Input or Output Voltage Range – 0.5 to VDD + 0.5
V
(DC or Transient)
Iin
Input Current (DC or Transient)
± 10
mA
per Control Pin
ISW
Switch Through Current
PD
Power Dissipation,
per Package (Note 3.)
± 25
mA
500
mW
TA
Ambient Temperature Range
Tstg
Storage Temperature Range
TL
Lead Temperature
(8–Second Soldering)
– 55 to +125
°C
– 65 to +150
°C
260
°C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v v high–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
PDIP–14
P SUFFIX
CASE 646
MARKING
DIAGRAMS
14
MC14016BCP
AWLYYWW
1
SOIC–14
D SUFFIX
CASE 751A
14
14016B
AWLYWW
1
SOEIAJ–14
F SUFFIX
CASE 965
14
MC14016B
AWLYWW
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14016BCP
PDIP–14
2000/Box
MC14016BD
SOIC–14
55/Rail
MC14016BDR2 SOIC–14 2500/Tape & Reel
MC14016BF
SOEIAJ–14 See Note 1.
MC14016BFEL SOEIAJ–14 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
© Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 3
Publication Order Number:
MC14016B/D
 

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