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74HC132NB View Datasheet(PDF) - Philips Electronics

Part NameDescriptionManufacturer
74HC132NB Quad 2-input NAND Schmitt trigger Philips
Philips Electronics Philips
74HC132NB Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Philips Semiconductors
Quad 2-input NAND Schmitt trigger
Product specification
74HC/HCT132
FEATURES
Output capability: standard
ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The difference between the positive voltage
VT+ and the negative voltage VTis defined as the hysteresis voltage VH.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
HC
HCT
tPHL/ tPLH
propagation delay nA, nB to nY
CL = 15 pF; VCC = 5 V 11
17
CI
input capacitance
3.5
3.5
CPD
power dissipation capacitance per gate notes 1 and 2
24
20
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
(CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
UNIT
ns
pF
pF
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
September 1993
2
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