74VHC157SJX(2007) View Datasheet(PDF) - Fairchild Semiconductor
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Description
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74VHC157SJX Datasheet PDF : 10 Pages
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74VHC157
Quad 2-Input Multiplexer
May 2007
tm
Features
■ High Speed: tPD = 4.1ns (Typ.) at VCC = 5V
■ Low power dissipation: ICC = 4µA (Max.) at TA = 25°C
■ High noise immunity: VNIH = VNIL = 28% VCC (Min.)
■ Power down protection is provided on all inputs
■ Low noise: VOLP = 0.8V (Max.)
■ Pin and function compatible with 74HC157
General Description
The VHC157 is an advanced high speed CMOS Quad
2-Channel Multiplexer fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar
to equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
It consists of four 2-input digital multiplexers with com-
mon select and enable inputs. When the ENABLE input
is held “H” level, selection of data is inhibited and all the
outputs become “L” level. The SELECT decoding deter-
mines whether the I0x or I1x inputs get routed to their cor-
responding outputs.
An Input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and on two supply systems such as battery
back up. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Order Number
Package
Number
Package Description
74VHC157M
74VHC157SJ
M16A
M16D
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150”
Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC157MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
Connection Diagram
Pin Description
Pin Names
I0a–I0d
I1a–I1d
E
S
Za–Zd
Description
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input
Select Input
Outputs
©1992 Fairchild Semiconductor Corporation
74VHC157 Rev. 1.2
www.fairchildsemi.com
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