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ADV7182WBCPZ View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
ADV7182WBCPZ 10-Bit, SDTV Video Decoder with Differential Inputs ADI
Analog Devices ADI
ADV7182WBCPZ Datasheet PDF : 96 Pages
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ADV7182
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
General Description ......................................................................... 3
Overview of the Analog Front End............................................ 3
Overview of the Standard Definition Processor ...................... 4
Specifications..................................................................................... 5
Electrical Characteristics ............................................................. 5
Video Specifications ..................................................................... 6
Timing Specifications .................................................................. 7
Analog Specifications................................................................... 8
Thermal Specifications ................................................................ 8
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configuration and Function Descriptions........................... 10
Power Supply Sequencing.............................................................. 11
Power-Up Sequence ................................................................... 11
Power-On RESET ....................................................................... 11
Universal Power Supply ............................................................. 11
Input Networks ............................................................................... 12
Single-Ended Input Network .................................................... 12
Differential Input Network ....................................................... 12
Analog Front End ........................................................................... 13
Input Configuration ................................................................... 13
Analog Input Muxing ................................................................ 13
Antialiasing Filters ..................................................................... 15
Global Control Registers ............................................................... 16
Power-Saving Modes.................................................................. 16
Reset Control .............................................................................. 16
Global Pin Control ..................................................................... 16
Global Status Register .................................................................... 18
Identification ............................................................................... 18
Status 1 ......................................................................................... 18
Status 2 ......................................................................................... 18
Status 3 ......................................................................................... 18
Autodetection Result.................................................................. 18
Video Processor .............................................................................. 19
SD Luma Path ............................................................................. 19
REVISION HISTORY
3/13—Rev. 0 to Rev. A
Change to Features Section ............................................................. 1
Changes to General Description Section ...................................... 4
Changes to Free Run Operation Section and Table 33, Added Luma
Ramp Test Pattern Section, VS_COAST_MODE[1:0], Address
0xF9[3:2] Section, and Table 34, Renumbered Sequentially.......... 24
SD Chroma Path......................................................................... 19
ACE and Dither Processing Blocks.......................................... 20
Sync Processing .......................................................................... 20
VBI Data Recovery..................................................................... 20
General Setup.............................................................................. 20
Color Controls ............................................................................ 22
Free-Run Operation ................................................................... 24
Clamp Operation........................................................................ 25
Luma Filter .................................................................................. 26
Chroma Filter.............................................................................. 29
Gain Operation........................................................................... 30
Chroma Transient Improvement (CTI) .................................. 34
Digital Noise Reduction (DNR) and Luma Peaking Filter ... 35
Comb Filters................................................................................ 36
IF Filter Compensation ............................................................. 38
Adaptive Contrast Enhancement (ACE)................................. 38
Dither Function .......................................................................... 39
AV Code Insertion and Controls ............................................. 40
Synchronization Output Signals............................................... 41
Sync Processing .......................................................................... 48
VBI Data Decode ....................................................................... 48
I2C Readback Registers .............................................................. 56
Pixel Port Configuration ............................................................... 60
MPU Port Description................................................................... 61
Register Access............................................................................ 62
Register Programming............................................................... 62
I2C Sequencer.............................................................................. 62
I2C Register Maps ........................................................................... 63
PCB Layout Recommendations.................................................... 94
Analog Interface Inputs ............................................................. 94
Power Supply Decoupling ......................................................... 94
VREFN and VREFP ................................................................... 94
Digital Outputs (Both Data and Clocks) ................................ 94
Digital Inputs .............................................................................. 94
Typical Circuit Connection........................................................... 95
Outline Dimensions ....................................................................... 96
Ordering Guide .......................................................................... 96
Automotive Products ................................................................. 96
Changes to Register 0x14, Table 94.............................................. 72
Changes to Register 0xF9, Table 94.............................................. 82
1/13—Revision 0: Initial Version
Rev. A | Page 2 of 96
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