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ADV7182 View Datasheet(PDF) - Analog Devices

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ADV7182 Datasheet PDF : 96 Pages
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Data Sheet
AD_SECAM_EN, SECAM Autodetect Enable,
Address 0x07[6]
Setting AD_SECAM_EN to 0 (default) disables the autodetection
of SECAM.
Setting AD_SECAM_EN to 1 enables the detection of SECAM.
AD_N443_EN, NTSC 4.43 Autodetect Enable,
Address 0x07[5]
Setting AD_N443_EN to 0 disables the autodetection of NTSC
style systems with a 4.43 MHz color subcarrier.
Setting AD_N443_EN to 1 (default) enables the detection of
NTSC style systems with a 4.43 MHz color subcarrier.
AD_P60_EN, PAL 60 Autodetect Enable, Address 0x07[4]
Setting AD_P60_EN to 0 disables the autodetection of PAL
systems with a 60 Hz field rate.
Setting AD_P60_EN to 1 (default) enables the detection of PAL
systems with a 60 Hz field rate.
AD_PALN_EN, PAL N Autodetect Enable,
Address 0x07[3]
Setting AD_PALN_EN to 0 (default) disables the detection of
the PAL N standard.
Setting AD_PALN_EN to 1 enables the detection of the PAL N
standard.
AD_PALM_EN, PAL M Autodetect Enable,
Address 0x07[2]
Setting AD_PALM_EN to 0 (default) disables the autodetection
of PAL M.
Setting AD_PALM_EN to 1 enables the detection of PAL M.
AD_NTSC_EN, NTSC Autodetect Enable,
Address 0x07[1]
Setting AD_NTSC_EN to 0 (default) disables the detection of
standard NTSC.
Setting AD_NTSC_EN to 1 enables the detection of standard NTSC.
ADV7182
AD_PAL_EN, PAL B/PAL D/PAL I/PAL G/PAL H
Autodetect Enable, Address 0x07[0]
Setting AD_PAL_EN to 0 (default) disables the detection of
standard PAL.
Setting AD_PAL_EN to 1 enables the detection of standard PAL.
SFL_INV, Subcarrier Frequency Lock Inversion,
Address 0x41[6]
This bit controls the behavior of the PAL switch bit in the SFL
(genlock telegram) data stream. It was implemented to solve
some compatibility issues with video encoders. It solves two
problems.
First, the PAL switch bit is meaningful only in PAL. Some encoders
(including Analog Devices encoders) also look at the state of
this bit in NTSC.
Second, there was a design change in Analog Devices encoders
from ADV717x to ADV719x. The older versions used the SFL
(genlock telegram) bit directly, whereas the newer ones invert
the bit prior to using it. The reason for this is that the inversion
compensated for the one line delay of an SFL (genlock telegram)
transmission.
As a result, for the ADV717x and ADV73xx encoders, the PAL
switch bit in the SFL (genlock telegram) must be set to 0 for NTSC
to work. For the older video encoders, the PAL switch bit in the
SFL must be set to 1 to work in NTSC. If the state of the PAL switch
bit is wrong, a 180° phase shift occurs.
In a decoder/encoder back-to-back system in which SFL is used,
this bit must be set up properly for the specific encoder used.
Setting SFL_INV to 0 (default) makes the part SFL compatible
with the ADV717x and ADV73xx video encoders.
Setting SFL_INV to 1 makes the part SFL compatible with the
older video encoders.
Lock Related Controls
Lock information is presented to the user through Bits[2:0] of the
Status 1 register (see the Status 1[7:0], Address 0x10[7:0] section).
Figure 13 outlines the signal flow and the controls that are available
to influence the way the lock status information is generated.
TIME_WIN
FREE_RUN
fSC LOCK
SELECT THE RAW LOCK SIGNAL
SRLS
FILTER THE RAW LOCK SIGNAL
CIL[2:0], COL[2:0]
1
0
0
COUNTER INTO LOCK
COUNTER OUT OF LOCK
1
MEMORY
STATUS 1[0]
STATUS 1[1]
TAKE fSC LOCK INTO ACCOUNT
FSCLE
Figure 13. Lock Related Signal Path
Rev. A | Page 21 of 96
 

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