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SI9961 View Datasheet(PDF) - Vishay Semiconductors

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SI9961
Vishay
Vishay Semiconductors Vishay
SI9961 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Si9961
Vishay Siliconix
If a unit step voltage is applied to the above transfer function
and the inverse Laplace transform is taken, the output result is:
VO + A
p ) (x * p) x e*x t
x
Where t = time
As we can see, if x = p (i.e. if the VCM pole and compensation
amplifier zero = the transconductance closed loop pole), then
Vo reduces to A. In other words, a step input results in a step
output without overshoot. If x < p then a step input results in an
increased rise time output and no overshoot. If x > p, a step
input results in a step output with an overshoot.
If this overshoot is large enough, there may be a
cross-conduction condition in the output FETs.
Let us look at the above equation at t = 0 and t >> 0, expressed
in terms of the open loop high frequency voltage gain, A.
VO + A
VO
+p
Lv
B
At t = 0
At t uu 0
In the example shown above, p = 10,000 and A = 9.8. This
means that there is some overshoot. At t = 0, the output voltage
is 9.8 V per volt of input. At some later time, it has dropped to
7.5 V per volt of input. An overshoot of 31 % is thus produced.
The maximum overshoot voltage requires careful
consideration, since it constitutes a potentially catastrophic
problem area. If we had decided to optimize for no overshoot,
A would equal 7.5, and hence the closed loop pole (A * B / Lv)
would be 10,000, which is a frequency of 1.592 kHz. This
would have resulted in a phase margin degradation of 13_ at
the 367-Hz frequency desired. This may or may not be
acceptable. One must weigh the servo bandwidth, phase
margin degradation, and maximum voltage at the VCM for
each individual case.
Result:
In the example for the 2081-Hz roll-off case with 31%
overshoot and proper pole cancellation, the compensation
values are:
RL = 6.2 kW
CL = 0.016 mF
In the example for the 1592-Hz roll-off case with no overshoot
and proper pole cancellation, the compensation values are:
RL = 4.7 kW
CL = 0.022 mF
The linearity of the transconductance amplifier (around a
center value of 500 mA/volt) is shown in Figure 2. In this case,
the output current sense resistors (RSA and RSB) were "5%
tolerance, 0.5 W . Any mismatch between RSA and RSB
contribute directly to mismatch between the positive and
negative full-scale. Including the external resistor mismatch,
the overall loop nonlinearity is approximately 1% maximum
over a "250-mV input voltage range.
5
4
3
2
1
0
1 VDD = 12 V
RSA = RSB = 0.5 W 5%
2 Rm = 52 W
3
Gm = 500 mA/V
4
5
300 200 100 0 100 200 300
VIN in mV
FIGURE 2. Si9961 Transconductance
End Point Non-Linearity
Document Number: 70014
S-20883Rev. G, 24-Jun-02
www.vishay.com
7
 

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