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ADV471KP66 View Datasheet(PDF) - Analog Devices

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ADV471KP66 Datasheet PDF : 12 Pages
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ADV478/ADV471–SPECIFICATIONS (VAA1 = +5 V, SETUP = 8/6 = VAA, VREF = +1.235 V. RSET = 147 .
All specifications TMIN to TMAX2 unless otherwise noted.)
Parameter
All Versions
Units
Test Conditions/Comments
STATIC PERFORMANCE
Resolution (Each DAC)3
Accuracy (Each DAC)3
Integral Nonlinearity
Differential Nonlinearity
Gray Scale Error
Coding
8 (6)
± 1 (1/4)
± 1 (1/4)
±5
Binary
Bits
LSB max
LSB max
% Gray Scale max
Guaranteed Monotonic
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
2
V min
0.8
V max
±1
µA max
VIN = 0.4 V or 2 .4 V
7
pF max
OBSOLETE DIGITAL OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance
ANALOG OUTPUTS
Gray Scale Current Range
Output Current
White Level Relative to Blank
White Level Relative to Black
Black Level Relative to Blank
(SETUP = VAA)
Black Level Relative to Blank
(SETUP = GND)
Blank Level
2.4
0.4
50
7
20
17.69
20.40
16.74
18.50
0.95
1.90
0
50
6.29
8.96
V min
V max
µA max
pF max
mA max
mA min
mA max
mA min
mA max
mA min
mA max
µA min
µA max
mA min
mA max
ISOURCE = 400 µA
ISINK = 3.2 mA
Typically 19.05 mA
Typically 17.62 mA
Typically 1.44 mA
Typically 5 µA
Typically 7.62 mA
Sync Level
0
µA min
Typically 5 µA
LSB Size3
50
69.1 (279.68)
µA max
µA typ
8/6 = Logical 1 for ADV478
DAC to DAC Matching
5
% max
Typically 2%
Output Compliance, VOC
–1
V min
+1.5
V max
Output Impedance, ROUT
10
ktyp
Output Capacitance, COUT
30
pF max
IOUT = 0 mA
VOLTAGE REFERENCE
Voltage Reference Range, VREF
Input Current, IVREF
1.14/1.26
10
V min/V max
µA typ
Tested in Voltage Reference
Configuration with VREF = 1.235 V
POWER SUPPLY
Supply Voltage, VAA
Supply Current, IAA
Power Supply Rejection Ratio
Power Dissipation
4.75/5.25
4.50/5.50
220
0.5
1100
V min/V max
V min/V max
mA max
%/% max
mW max
80 MHz and 66 MHz Parts
50 MHz and 35 MHz Parts
Typically 180 mA
f = 1 kHz, COMP = 0.1 µF
Typically 900 mW, VAA = 5 V
DYNAMIC PERFORMANCE
Clock and Data Feedthrough4, 5
–30
Glitch Impulse4, 5
75
DAC to DAC Crosstalk6
–23
dB typ
pV secs typ
dB typ
NOTES
1± 5% for 80 MHz and 66 MHz parts; ± 10% for 50 MHz and 35 MHz parts.
2Temperature Range (TMIN to TMAX); 0°C to +70°C.
3Numbers in parentheses indicate ADV471 parameter value.
4Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. For this test, the digital inputs have a 1 k resistor to
ground and are driven by 74HC logic. Glitch impulse includes clock and data feedthrough, –3 dB test bandwidth = 2 × clock rate.
5TTL input values are 0 to 3 volts, with input rise/fall times 3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and out-
puts. Analog output load 10 pF, D0–D7 output load 50 pF. See timing notes in Figure 2.
6DAC to DAC crosstalk is measured by holding one DAC high while the other two are making low to high and high to low transitions.
Specifications subject to change without notice.
–2–
REV. B
 

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