|ADV471KP80||CMOS 80 MHz Monolithic 256 x 24(18) Color Palette RAM-DACs|
|ADV471KP80 Datasheet PDF : 12 Pages |
Digital Signal Interconnect
The digital inputs to the ADV478/ADV471 should be isolated
as much as possible from the analog outputs and other analog
circuitry. Also, these input signals should not overlay the analog
Due to the high clock rates involved, long clock lines to the
ADV478/ADV471 should be avoided to reduce noise pickup.
Analog Signal Interconnect
The ADV478/ADV471 should be located as close as possible to
the output connectors to minimize noise pickup and reflections
due to impedance mismatch.
The video output signals should overlay the ground plane, and
not the analog power plane, to maximize the high frequency
power supply rejection.
Any active termination resistors for the digital inputs should be
connected to the regular PCB power plane (VCC), and not the
analog power plane.
For maximum performance, the analog outputs should each
have a 75 Ω load resistor connected to GND. The connection
between the current output and GND should be as close as pos-
sible to the ADV478/ADV471 to minimize reflections.
NOTE: Additional information on PC Board layout can be
OBSOLETE obtained in an application note entitled “Design and Layout of
a Video Graphics System for Reduced EMI” from Analog
Devices (Publication Note E1309–15–10/89).
Figure 6. Typical Connection Diagram and Component List (External Current Reference)
EXTERNAL VOLTAGE VS. CURRENT REFERENCE
The ADV478/ADV471 is designed to have excellent perfor-
mance using either an external voltage or current reference.
The voltage reference design (Figure 5) has the advantages of
temperature compensation, simplicity, lower cost and provides
excellent power supply rejection. The current reference design
(Figure 6) requires more components to provide adequate
power supply rejection and temperature compensation (two
transistors, three resistors and additional capacitors).
RS-170 Video Generation
For generation of RS-170 compatible video, it is recommended
that the DAC outputs be connected to a singly terminated 75 Ω
load. If the ADV478/ADV471 is not driving a large capacitive
load, there will be negligible difference in video quality between
doubly terminated 75 Ω and singly terminated 75 Ω loads.
If driving a large capacitive load (load RC> 1/(2 π fC)), it is rec-
ommended that an output buffer (such as an AD848 or
AD9617 with an unloaded gain>2) be used to drive a doubly
terminated 75 Ω load.
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