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ADV478KP35 View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
ADV478KP35 CMOS 80 MHz Monolithic 256 x 24(18) Color Palette RAM-DACs ADI
Analog Devices ADI
ADV478KP35 Datasheet PDF : 12 Pages
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ADV478/ADV471
PC BOARD LAYOUT CONSIDERATIONS
The PCB power plane should provide power to all digital logic
PC Board Considerations
on the PC board, and the analog power plane should provide
The layout should be optimized for lowest noise on the ADV478/
power to all ADV478/ADV471 power pins and current/voltage
ADV471 power and ground lines by shielding the digital inputs reference circuitry.
and providing good decoupling. The lead length between groups of
VAA and GND pins should by minimized so as to minimize in-
ductive ringing.
Plane-to-plane noise coupling can be reduced by ensuring that
portions of the regular PCB power and ground planes do not
overlay portions of the analog power plane, unless they can be
Ground Planes
arranged such that the plane-to-plane noise is common mode.
The ground plane should encompass all ADV478/ADV471
ground pins, current/voltage reference circuitry, power supply
bypass circuitry for the ADV478/ADV471, the analog output
traces and all the digital signal traces leading up to the ADV478/
ADV471.
Supply Decoupling
For optimum performance, bypass capacitors should be in-
stalled using the shortest leads possible, consistent with reliable
operation, to reduce the lead inductance.
OBSOLETE Power Planes
The ADV478/ADV471 and any associated analog circuitry
should have its own power plane, referred to as the analog power
plane. This power plane should be connected to the regular PCB
power plane (VCC) at a single point through a ferrite bead, as il-
lustrated in Figures 5 and 6. This bead should be located within
three inches of the ADV478/ADV471.
Best performance is obtained with a 0.1 µF ceramic capacitor
decoupling each of the two groups of VAA pins to GND. These
capacitors should be placed as close as possible to the device.
It is important to note that while the ADV478 and ADV471
contain circuitry to reject power supply noise, this rejection
decreases with frequency. If a high frequency switching power
supply is used, the designer should pay close attention to reduc-
ing power supply noise and consider using a three terminal volt-
age regulator for supplying power to the analog power plane.
Figure 5. Typical Connection Diagram and Component List (External Voltage Reference)
–10–
REV. B
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