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FW82371AB View Datasheet(PDF) - Intel

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FW82371AB Datasheet PDF : 284 Pages
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E
82371AB (PIIX4)
6.1.5. RID—Revision Identification Register (Function 2) ...........................................................................104
6.1.6. CLASSC—Class Code Register (Function 2) ...................................................................................104
6.1.7. MLT—Master Latency Timer Register (Function 2) ..........................................................................105
6.1.8. HEDT—Header Type Register (Function 2)......................................................................................105
6.1.9. INTLN—Interrupt Line Register (Function 2).....................................................................................105
6.1.10. INTPN—Interrupt Pin (Function 2) ..................................................................................................106
6.1.11. SBRNUM—Serial Bus Release Number (Function 2) ....................................................................106
6.1.12. LEGSUP—Legacy Support Register (Function 2) ..........................................................................107
6.1.13. USBBA—USB I/O Space Base Address Register (Function 2)......................................................108
6.1.14. MISCSUP—Miscellaneous Support Register (Function 2) .............................................................109
6.2. USB Host Controller IO Space Registers.................................................................................................109
6.2.1. USBCMD—USB Command Register (IO) ........................................................................................109
6.2.2. USBSTS—USB Status Register (IO) ................................................................................................111
6.2.3. USBINTR—USB Interrupt Enable Register (IO) ...............................................................................112
6.2.4. FRNUM—Frame Number Register (IO) ............................................................................................113
6.2.5. FLBASEADD—Frame List Base Address Register (IO)...................................................................113
6.2.6. SOFMOD—Start Of Frame (SOF) Modify Register (IO)...................................................................114
6.2.7. PORTSC—Port Status and Control Register (IO).............................................................................115
7.0. POWER MANAGEMENT REGISTER DESCRIPTIONS ............................................................................117
7.1. Power Management PCI Configuration Registers (PCI Function 3) ........................................................117
7.1.1. VID—Vendor Identification Register (Function 3)..............................................................................117
7.1.2. DID—Device Identification Register (Function 3)..............................................................................117
7.1.3. PCICMD—PCI Command Register (Function 3) ..............................................................................117
7.1.4. PCISTS—PCI Device Status Register (Function 3)..........................................................................118
7.1.5. RID—Revision Identification Register (Function 3) ...........................................................................119
7.1.6. CLASSC—Class Code Register (Function 3) ...................................................................................119
7.1.7. HEDT—Header Type Register (Function 3)......................................................................................119
7.1.8. INTLN—Interrupt Line Register (Function 3).....................................................................................120
7.1.9. INTPN—Interrupt Pin (Function 3) ....................................................................................................120
7.1.10. PMBA—Power Management Base Address (Function 3)...............................................................120
7.1.11. CNTA—Count A (Function 3) ..........................................................................................................121
7.1.12. CNTB—Count B (Function 3) ..........................................................................................................121
7.1.13. GPICTL—General Purpose Input Control (Function 3)...................................................................123
7.1.14. DEVRESD—Device Resource D (Function 3)................................................................................123
7.1.15. DEVACTA—Device Activity A (Function 3) ....................................................................................125
7.1.16. DEVACTB—Device Activity B (Function 3) ....................................................................................126
7.1.17. DEVRESA—Device Resource A (Function 3) ................................................................................127
7.1.18. DEVRESB—Device Resource B (Function 3) ................................................................................129
7.1.19. DEVRESC—Device Resource C (Function 3)................................................................................130
7.1.20. DEVRESE—Device Resource E (Function 3) ................................................................................131
7.1.21. DEVRESF—Device Resource F (Function 3).................................................................................131
7.1.22. DEVRESG—Device Resource G (Function 3) ...............................................................................132
PRELIMINARY
7
4/9/97 2:23 PM PIIX4aDS
INTEL CONFIDENTIAL
(until publication date)
 

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