FW82371AB View Datasheet(PDF) - Intel

Part Name

Description

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FW82371AB

PCI-TO-ISA / IDE XCELERATOR (PIIX4)

Intel 

E

82371AB (PIIX4)

2.1.12. OTHER SYSTEM AND TEST SIGNALS

Name

CONFIG1

CONFIG2

PWROK

SPKR

TEST#

Type

Description

I CONFIGURATION SELECT 1. This input signal is used to select the type of

microprocessor being used in the system. If CONFIG1=0, the system contains a

Pentium microprocessor. If CONFIG1=1, the system contains a Pentium II

microprocessor. It is used to control the polarity of INIT and CPURST signals.

I CONFIGURATION SELECT 2. This input signal is used to select the positive or

subtractive decode of FFFF0000h–FFFFFFFFh memory address range (top 64 Kbytes).

If CONFIG[2]=0, the PIIX4 will positively decode this range. If CONFIG[2]=1, the PIIX4

will decode this range with subtractive decode timings only. The input value of this pin

must be static and may not dynamically change during system operations.

I POWER OK. When asserted, PWROK is an indication to PIIX4 that power and PCICLK

have been stable for at least 1 ms. PWROK can be driven asynchronously. When

PWROK is negated, PIIX4 asserts CPURST, PCIRST# and RSTDRV. When PWROK is

driven active (high), PIIX4 negates CPURST, PCIRST#, and RSTDRV.

O SPEAKER. The SPKR signal is the output of counter timer 2 and is internally “ANDed”

with Port 061h bit 1 to provide the Speaker Data Enable. This signal drives an external

speaker driver device, which in turn drives the ISA system speaker.

During Reset: Low

After Reset: Low

During POS: Last State

I TEST MODE SELECT. The test signal is used to select various test modes of PIIX4.

This signal must be pulled up to VCC(SUS) for normal operation.

2.1.13. POWER AND GROUND PINS

Name

VCC

VCC (RTC)

VCC (SUS)

VCC (USB)

VREF

VSS

VSS (USB)

Type

Description

V CORE VOLTAGE SUPPLY. These pins are the primary voltage supply for the PIIX4

core and IO periphery and must be tied to 3.3V.

V RTC WELL VOLTAGE SUPPLY. This pin is the supply voltage for the RTC logic and

must be tied to 3.3V.

V SUSPEND WELL VOLTAGE SUPPLY. These pins are the primary voltage supply for

the PIIX4 suspend logic and IO signals and must be tied to 3.3V.

V USB VOLTAGE SUPPLY. This pin is the supply voltage for the USB input/output

buffers and must be tied to 3.3V.

V VOLTAGE REFERENCE. This pin is used to provide a 5V reference voltage for 5V safe

input buffers.

VREF must be tied to 5V in a system requiring 5V tolerance. In a 5V tolerant system, this

signal must power up before or simultaneous to VCC. It must power down after or

simultaneous to VCC.

In a non-5V tolerant system (3.3V only), this signal can be tied directly to VCC. There are

then no sequencing requirements.

V CORE GROUND. These pins are the primary ground for PIIX4.

V USB GROUND. This pin is the ground for the USB input/output buffers.

PRELIMINARY

39

4/9/97 2:23 PM PIIX4aDS

INTEL CONFIDENTIAL

(until publication date)

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