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TEA1098TV View Datasheet(PDF) - Philips Electronics

Part NameDescriptionManufacturer
TEA1098TV Speech and handsfree IC Philips
Philips Electronics Philips
TEA1098TV Datasheet PDF : 40 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Philips Semiconductors
Speech and handsfree IC
Product specification
TEA1098A
FUNCTIONAL DESCRIPTION
All data given in this chapter are typical values, except
when otherwise specified.
Supplies
LINE INTERFACE AND INTERNAL SUPPLY (PINS LN, SLPE,
REG AND VBB)
The supply for the TEA1098A and its peripherals is
obtained from the line. The IC generates a stabilized
reference voltage (Vref) between pins SLPE and GND.
This reference voltage is equal to 3.7 V for line currents
lower than 18 mA. It than increases linearly with the line
current and reaches the value of 6.1 V for line currents
higher than 45 mA. For line currents below 9 mA, the
internal reference voltage generating Vref is automatically
adjusted to a lower value. This is the so-called low voltage
area and the TEA1098A has limited performances in this
area (see Section “Low voltage behaviour”). This
reference voltage is temperature compensated.
The voltage between pins SLPE and REG is used by the
internal regulator to generate the stabilized reference
voltage and is decoupled by means of a capacitor between
pins LN and REG.
This capacitor converted into an equivalent inductance
realizes the set impedance conversion from its DC value
(RSLPE) to its AC value (done by an external impedance).
The IC regulates the line voltage at pin LN and can be
calculated as follows:
VLN = Vref + RSLPE × ISLPE
ISLPE = Iline Ix
where:
Iline = line current
Ix = current consumed on pin LN (approximately a few µA)
ISLPE = current flowing through the RSLPE resistor
The preferred value for RSLPE is 20 . Changing this value
will affect more than the DC characteristics; it also
influences the transmit gains to the line, the gain control
characteristic, the sidetone level and the maximum output
swing on the line.
handbook, full pagewidLthN
REG
GND
SLPE
CREG
TP1
4.7 µF
R3
RSLPE
20
TR2
TR1
E1
D1
J1
R1
TN2
R2
from
J2
preamp
TN1
GND
Fig.3 Line interface principle.
GND
VBB
E2
D1
MGM298
2000 Aug 18
7
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