74ABT16652CMTD View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

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74ABT16652CMTD

16-Bit Transceivers and Registers with 3-STATE Outputs

Fairchild Semiconductor 

Functional Description

In the transceiver mode, data present at the HIGH imped-

ance port may be stored in either the A or B register or

both.

The select (SABn, SBAn) controls can multiplex stored and

real-time.

The examples in Figure 1 demonstrate the four fundamen-

tal bus-management functions that can be performed with

the ABT16652.

Data on the A or B data bus, or both can be stored in the

internal D flip-flop by LOW to HIGH transitions at the

appropriate Clock Inputs (CPABn, CPBAn) regardless of

the Select or Output Enable Inputs. When SAB and SBA

are in the real time transfer mode, it is also possible to

store data without using the internal D flip-flops by simulta-

neously enabling OEABn and OEBAn. In this configuration

each Output reinforces its Input. Thus when all other data

sources to the two sets of bus lines are in a HIGH imped-

ance state, each set of bus lines will remain at its last state.

Note A: Real-Time

Transfer Bus B to Bus A

Note C: Storage

OEAB OEBA CPAB CPBA SAB SBA

1

1

1

1

1

1

L

L

X

X XL

Note B: Real-Time

Transfer Bus A to Bus B

OEAB OEBA CPAB CPBA SAB SBA

1

X

L

L

1

H

X

H

1

X

1

X

1

X

X

X

1

X

X

X

Note D: Transfer Storage

Data to A or B

OEAB OEBA CPAB CPBA SAB SBA

1

1

1

1

1

1

H

H

X

X

LX

FIGURE 1.

OEAB OEBA CPAB1 CPBA SAB SBA

1

1

1

1

1

H

L H or L H or L H H

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