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Part Name
Description
DM74AS652WMX View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
View to exact match
DM74AS652WMX
Octal Bus Transceiver and Register
Fairchild Semiconductor
DM74AS652WMX Datasheet PDF : 8 Pages
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DM74AS652 Switching Characteristics
Symbol
Parameter
Conditions
From
To
Min
f
MAX
Maximum Clock Frequency
V
CC
=
4.5V to 5.5V
90
t
PLH
Propagation Delay Time
R
1
=
R
2
=
500
Ω
LOW-to-HIGH Level Output
C
L
=
50 pF
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
2
CBA or CAB A or B
2
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
2
A or B
B or A
1
t
PLH
Propagation Delay Time
LOW-to-HIGH Level Output
2
SBA or SAB A or B
t
PHL
Propagation Delay Time
HIGH-to-LOW Level Output
(Note 5)
2
t
PZH
Output Enable Time
2
to HIGH Level Output
t
PZL
Output Enable Time
to LOW Level Output
t
PHZ
Output Disable Time
from HIGH Level Output
3
Enable GBA A
2
t
PLZ
Output Disable Time
2
from LOW Level Output
t
PZH
Output Disable Time
3
to HIGH Level Output
t
PZL
Output Disable Time
to LOW Level Output
t
PHZ
Output Disable Time
from HIGH Level Output
3
Enable GAB B
2
t
PLZ
Output Disable Time
2
from LOW Level Output
Note 5:
These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
Max
8.5
Units
MHz
ns
9
ns
9
ns
7
ns
11
ns
9
ns
10
ns
16
ns
9
ns
9
ns
11
ns
16
ns
10
ns
11
ns
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