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74LV245N View Datasheet(PDF) - NXP Semiconductors.

Part Name74LV245N NXP
NXP Semiconductors. NXP
DescriptionOctal bus transceiver; 3-state
74LV245N Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
NXP Semiconductors
4. Functional diagram
DIR
1
2 A0
A1
3
4 A2
A3
5
6 A4
7 A5
A6
8
9 A7
Fig 1. Logic symbol
OE
19
B0 18
B1
17
B2
16
B3 15
B4
14
B5
13
B6
12
B7 11
mna174
74LV245
Octal bus transceiver; 3-state
19
G3
1
3EN1
3EN2
1
2
18
2
3
17
4
16
5
15
6
14
7
13
8
12
9
11
mna175
Fig 2. IEC logic symbol
74LV245_3
Product data sheet
Rev. 03 — 15 April 2009
© NXP B.V. 2009. All rights reserved.
2 of 15
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General description
The 74LV245 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC245 and 74HCT245.
The 74LV245 is an octal transceiver with non-inverting 3-state bus compatible outputs in both send and receive directions. A send/receive (DIR) input controls direction, and an output enable (OE) input makes easy cascading possible. Pin OE controls the outputs so that the buses are effectively isolated.

Features
■ Wide operating voltage: 1.0 V to 5.5 V
■ Optimized for low voltage applications: 1.0 V to 3.6 V
■ Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
■ Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
■ Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
   Tamb = 25 °C
■ ESD protection:
   ◆ HBM JESD22-A114E exceeds 2000 V
   ◆ MM JESD22-A115-A exceeds 200 V
■ Multiple package options
■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C

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